As the value and use of information continues to increase, individuals and businesses seek additional ways to process and store information. One option available to users is information handling systems. An information handling system generally processes, compiles, stores, and/or communicates information or data for business, personal, or other purposes thereby allowing users to take advantage of the value of the information. Because technology and information handling needs and requirements vary between different users or applications, information handling systems may also vary regarding what information is handled, how the information is handled, how much information is processed, stored, or communicated, and how quickly and efficiently the information may be processed, stored, or communicated. The variations in information handling systems allow for information handling systems to be general or configured for a specific user or specific use such as financial transaction processing, airline reservations, enterprise data storage, or global communications. In addition, information handling systems may include a variety of hardware and software components that may be configured to process, store, and communicate information and may include one or more computer systems, data storage systems, and networking systems.
Certain information handling systems operate by running considerable initialization code at start-up. This initialization code is often stored in non-volatile memory within the system as part of the basic input output system (BIOS) of the system, and this initialization code will run when the system is powered up. In part, this initialization code typically includes code to initialize main memory for the system and to initialize the processors within the system. In multi-processor configuration, the system is typically configured in hardware to treat one of the CPUs (central processing units) as the boot strap processor (BSP) for the system. The BSP is the processor that has primary control over the initialization process. As such, the BIOS will begin operation by initializing the BSP at which time the BSP begins running the BIOS software code for the BSP to perform discovery and initialization of processors within the system.
More and more, information handling systems are taking advantage of advances in microprocessor technology to provide multi-processor systems in the form of microprocessors with multiple processing cores and/or microprocessors with multiple processing threads. Each processing core or each thread within each core is typically referred to as a distinct application processor (AP). In particular, current processors can have multiple cores (CPUs), and each core can have multiple threads (logical CPU). During the typical boot process, the BIOS must discover, map, and initialize all the application processors (APs) in a system. In these multi-processor environments, therefore, the BIOS must handle the initialization of each CPU, as well as the processing cores and threads within these CPUs. Traditionally, main memory for the system is initialized prior to multi-processor initialization. Because memory is shared among the CPUs, there is a need for the memory to be first initialized so that set mechanisms or locked semaphores exist to protect memory from being corrupted by shared CPU accesses.
During system initialization, some of the initialization tasks for the system may require a reset of the system. A reset late in power-on system test (POST) startup of the system can cause much of the initialization code in the BIOS to be re-run, resulting in increased boot time, as well as more complicated and less robust paths through POST. Current multi-processor initialization practices require the BSP to initialize the memory and use semaphores to coordinate memory accesses by the processors in the system. The requirement for atomic (locking) memory hardware upon which to build the semaphores forces processor initialization to occur late in POST, after the memory system has been initialized.
One initialization event that occurs late in initialization and can require reset is a modification to a processor power state. Some current microprocessors, for example, microprocessors available from Intel Corporation, have the capability of being operated in a number of different power states. In addition, current systems also now support different CPUs that routinely use the same form factor for attachment to a motherboard. These different CPUs, however, can have different power, current and frequency operating parameters, and these parameters can change depending upon the power mode within which the CPU is operating. The chipset or hardware for the system must, therefore, determine whether it can handle the required CPU operating parameters at the CPU's higher power modes. Depending upon the CPU and the power modes for that CPU, the hardware may or may not be able to allow the CPU to move to its higher power modes. The CPU will typically begin in a low power mode, with a handshake process occurring to determine if the CPU can move up power states. When the CPU moves up, however, the CPU is often required to go through a CPU reset cycle.
One problem with such a CPU reset is that it typically requires a system reset, and this in turn requires the initialization code in the BIOS to be re-run. Because the CPU power changes are also done during multi-processor initialization and after main memory initialization, much of the BIOS initialization code has to be repeatedly re-run. Thus, when a processor is moved to a higher power mode and requires a reset, memory initialization must be skipped or redone. If redone, the boot time can be significantly impacted and lengthened. If skipped, another problem can occur with certain processor sleep modes, where the CPU is put asleep but main memory is preserved. If memory initialization is skipped when CPUs are reset, the main memory may be less stable and, therefore, wakeup from the sleep/memory-preserved modes can be compromised.